Hi,
I am trying to use a game cart to make a interface for my projects with CPLDs / FPGA.
The cartridge I opened does not have the tracks for clock, read, write, a1 and others.
This kind of rom is not sync'd by the msx clock?

I could understand the missing /RD signal... /CS1 is probably used as /RD and CS at same time. But, why the address line A1 and the clock are missing?

Little help here?
Thanks.

It is quite strange a cartridge game without /RD and /A1. Did you checked it right?
Most of the games doesn't need the clock signal to work since a ROM/EEPROM/FLASH doesn't need that signal to work.

Yes, I do.
In fact, I opened a second one to make sure, and the tracks for those signals were missing as well. And that last game cartdrige is working just fine.

Which cartridges did you open?

Tennis. And Decathlon .

(brougth them from Brazil).

Those games must have A1 connected
Can you post a picture of both sides of the PCB?

Sure, as soon as I get back home late afternoon.
thanks.

You can see pictures from both sides in the link below. Click on each picture to see a large version.
http://ronivon.costa.googlepages.com/8bitbabymsx

A1 is connected on slot : are you sure you have a good pin out of the MSX cardtridge ?

see at : http://www.faq.msxnet.org/connector.html

Ok, I got confused... but I must have looked at the wrong place.

I was using the msxtech.pdf, page 33 as reference. But went back there to check, and at page 32 there is another table. Which, I suppose, is the one I need...


My fault, sorry... and thanks for the help.

I think you've spent too much time playing with FPGAs Roni!

Roms are generally asynchronous, so no clock is required. You need to read the datasheet for the part - generally they show a timing diagram which specifies the maximum speed you can access the ROM.

I notice that you may have been looking at the wrong pinouts? I'd be surprised if RD# was missing... it should be connected to the OE# on the ROM so that errant software attempting to write to the address space occupied by the ROM won't cause bus contention and potentially damage the hardware. It's not enough to wire CS# to OE# as well...

What are you planning to do with your 8bitbaby/CPLD cart BTW?

Quote:

I think you've spent too much time playing with FPGAs Roni! Roms are generally asynchronous, so no clock is required. You need to read the datasheet for the part - generally they show a timing diagram which specifies the maximum speed you can access the ROM. I notice that you may have been looking at the wrong pinouts? I'd be surprised if RD# was missing... it should be connected to the OE# on the ROM so that errant software attempting to write to the address space occupied by the ROM won't cause bus contention and potentially damage the hardware. It's not enough to wire CS# to OE# as well... What are you planning to do with your 8bitbaby/CPLD cart BTW?

You are right, I am playing, actually, only with FPGA, and now, want to make something "for real"


I was really looking the wrong pin out... but still, can't see the RD pin on the cartdrige. Look at the picture:
http://ronivon.costa.googlepages.com/P3060486mini.JPG/P3060486mini-full;init:.JPG

The prototypes boards are only for experimentation. Ultimately, I would like to have a functional SD/IDE interface. Not that I need one... otherwise I would have already bought one.
I want to learn how to make these things... for fun.


You seems to have good knowledge in this area. Don't want to co-participate in some kind of project?
)))