MSX complaints

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Par l_oliveira

Hero (534)

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11-05-2016, 22:56

You're supposed to use ONLY ROM routine for that, FYI. So if you were a MSX developer and were to adhere to ASCII rules that would not be a problem at all, because it's all handled by the BIOS slot control routines.

Par NYYRIKKI

Enlighted (6033)

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11-05-2016, 23:11

l_oliveira wrote:

The whole point is making it possible that each slot expander can remember it's own state and that writing on one won't disturb the others. The reason why the address is the last byte on memory is simply to make simpler for the logic design of the expander and programming reasons.

You seem to be stuck on the idea that the "no disturb" is a good thing while in real life it is very bad thing... My point was: What good is there that each main slot has own subslot? Give me one example where this is more handy than having common sub slot select in I/O port? What are your "programming reasons", what is wrong with the "disturb" you talk about and how you see this would be any "simpler logic design". I actually think current solution needs more logic gates than common I/O port handling would ever need. You say that now it can be done. I say now it must be be done because of this bad design and I would rather just skip this useless step as it gives 0 benefit in any possible programming or HW handling situation I can think of.

Par l_oliveira

Hero (534)

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11-05-2016, 23:20

What you just said is call "bad design" what makes the MSX different than a Coleco. The SLOT subsystem.

The point at the time (there were no memory mapper back then) was allow for more than 64KB with flexibility. Someone had the idea of further expand it with the sub slot system. It's easier and cheaper use the last byte of ram because you don't need inverters to change the logic. If you were to use byte 0 you would need a dedicated chip. The idea was build the computer with 74xx series chips and those are set on stone. They dictate what kind of variation the design can have and if you deviate from that you end needing more lego blocks to achieve your intended design.

That's 180 degrees from the direction the MSX was trying to reach. Their goal was make the board as simple as they could and with that, using 74xx existing lego ICs as building blocks. It's unfair call the SLOT mechanism poor design considering it's what make a MSX what it is. Take it off and you have a Coleco with AY-3-8910 as sound chip.

Par Grauw

Ascended (10707)

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11-05-2016, 23:37

Also it complicates the BIOS slot selection routines by a lot, slows them down significantly and restricts their capabilities. I don’t see value in preserving the subslot selection for each primary slot, I don’t think that was a reason for the current design.

I think the reason for the current design lies in detecting the presence of expanded slots. A seemingly minor task performed by the BIOS, however without it using slots would be problematic. If we would control subslots via I/O ports, since the slot system only applies to memory I/O, it would’ve been difficult if not impossible to reliably detect expanded slots. So one must use a memory I/O address to detect which primary slots are expanded.

And then, from a cost perspective, it makes sense to reuse that same decoding logic (the same address) for the control register, rather than an I/O port requiring separate decoding logic.

Not to say that I like the current design or that I don’t agree it’s awkward, and I’m sure there would’ve been a better alternative, but for me this seems the logical explanation and it helps me understand their reasons and how they would arrive at the current solution, especially when the subslot support was added later in the system design process after the primary slot system had already been designed.

If I could make one improvement, I would’ve made slot expanders ignore the slot select signal for writes to FFFFH, causing writes to that address to bypass the slotting system and affect all slotexpanders at once, basically eliminating all our troubles.

Par l_oliveira

Hero (534)

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11-05-2016, 23:40

Grauw, that's the fun bit on the eternal war of the hardware engineer versus the software engineer. Both are trying to make their task easier but doing so make the opposite side suffer in a proportional way. Smile

Par tvalenca

Paladin (747)

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11-05-2016, 23:45

l_oliveira wrote:

Grauw, that's the fun bit on the eternal war of the hardware engineer versus the software engineer. Both are trying to make their task easier but doing so make the opposite side suffer in a proportional way. Smile

LOL! HAHAHA! I think that's the real reason! LOL!

Par Grauw

Ascended (10707)

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11-05-2016, 23:48

Maybe they didn’t think of it while designing a whole new computer system from scratch under time pressure, and after the first MSX was released some engineer punched himself in the nuts that he hadn’t thought of it, but by then it was too late Smile.

Or maybe they had one particularly stubborn hardware engineer who insisted on retaining the integrity of the system and not wishing to allow hardware to bypass the slot selection mechanism for writes, fearing it might set a bad precedent or something.

Par NYYRIKKI

Enlighted (6033)

Portrait de NYYRIKKI

12-05-2016, 00:25

Grauw wrote:

I think the reason for the current design lies in detecting the presence of expanded slots. A seemingly minor task performed by the BIOS, however without it using slots would be problematic. If we would control subslots via I/O ports, since the slot system only applies to memory I/O, it would’ve been difficult if not impossible to reliably detect expanded slots. So one must use a memory I/O address to detect which primary slots are expanded.

Ok, you found one reason for this to exist, but I can think many better alternatives... ie. just defining 1 pin in cartridge slot connector for this purpose -> Would not need any logic, just jump wire inside slot expander. Inside computer there would need to be just one 4bit read gate that would handle ALL the slots expanded status.

Quote:

And then, from a cost perspective, it makes sense to reuse that same decoding logic (the same address) for the control register, rather than an I/O port requiring separate decoding logic.

Why I think it would be less trouble to implement I/O port decoding logic? I/O ports use only 8 bit address compared to memory address bus 16bits (less decoding logic needed) also cartridge would not need to handle reading logic as only one logic inside computer would need to be able handle also reads. Also if computer would have ie. both slot 0 & 3 expanded this same logic could be reused in both slots without doubling it... Way more simple.

Par l_oliveira

Hero (534)

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12-05-2016, 01:49

Nyyrikki, in a MSX ASIC, the current design allow them to reuse a single FFFFh address decode to toggle any eventual slot expander in the said slot expander.

This contraption:

Exploits that idea in the sense I have a single address decoding circuit who serves two slot expanders. One splits the 256KB FLASHROM into four 64KB ROM pages and the other generates four proper /SLTSEL signals. That allows for expanding slots 0 and 3 simultaneously. If I had to decode the address twice the circuitry would be a lot more complex.

Par flyguille

Prophet (3031)

Portrait de flyguille

12-05-2016, 02:57

l_oliveira wrote:

Nyyrikki, in a MSX ASIC, the current design allow them to reuse a single FFFFh address decode to toggle any eventual slot expander in the said slot expander.

This contraption:

Exploits that idea in the sense I have a single address decoding circuit who serves two slot expanders. One splits the 256KB FLASHROM into four 64KB ROM pages and the other generates four proper /SLTSEL signals. That allows for expanding slots 0 and 3 simultaneously. If I had to decode the address twice the circuitry would be a lot more complex.

I hope you didn't mix those $FFFF registers, Each $FFFF register value must be independent, one for each primary slot.

Yes, MSX standard complicated it a lot unnecesarily if they just setup one global $FFFF register from the beginning as required, but not.

Each $FFFF register is independent, and that is way the slotting routines must set the target's primary slot in page 3 aswell, just to adjust the related $FFFF register, and then to restore page 3 to its original... :(

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