VDP Status register , what do i miss here?

Por Wlcracks

Hero (572)

15-02-2018, 20:20

The idea is not using the interrupt but by polling the status register running the program.

I tried this:

Quote:

WaitForVDP_Vblank.restart:

ld a, #1<<5 ;//

out ( 0x91 ), a

WaitForVDP_Vblank1:

call 0x13e
bit #7,a
jp z, WaitForVDP_Vblank1

ld a, #0
out ( 0x91 ), a

WaitForVDP_Vblank2:

call 0x13e
bit #7,a
jp z, WaitForVDP_Vblank2

jp WaitForVDP_Vblank.restart

With an Saleae Logic 16 connected to the printer port on a VG8020/00. It show this screen:

It isnt 50hz on the output all the time.

Anyone ever used this VDP status register Frame Flag? I googled my best but couldn't find any topics on using this.
openMSX i tried testing it with another code changing the background color, but it seems stable.

I tried the same code setup on a NMS8220, even more unstable.

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Por Grauw

Ascended (10819)

15-02-2018, 20:58

Since the numbers say 40 ms and 20 ms, it indicates that interrupts are missed.

Since the flag will be reset when it’s read, if there is something else reading it, you will miss the update. Bit 7 is tested by the ISR, and absolutely reliable. I’m assuming that in this loop interrupts are disabled, and not enabled by the BIOS call? Though, if that were the case then it should always return 0.

Try reading the status register manually using in a,(99h) and see if the results differ.

Por Wlcracks

Hero (572)

15-02-2018, 21:07

The MSX GOD responded arrrgghhh omg omg!
LOL sorry, i mean Thank you for your response!
Yes there is a 'di' in front of it sorry, forgot that.

new code (compiled)

Quote:

2F07 F3 [ 4]12344 di
2F08 12345 WaitForVDP_Vblank.restart:
2F08 3E 20 [ 7]12346 ld a, #1<<5 ;
2F0A D3 91 [11]12347 out ( #0x91 ), a
2F0C 12348 WaitForVDP_Vblank1:
2F0C DB 99 [11]12349 in a, ( #0x99)
2F0E CB 7F [ 8]12350 bit #7,a
2F10 CAr0Cr2F [10]12351 jp z, WaitForVDP_Vblank1
2F13 3E 00 [ 7]12352 ld a, #0
2F15 D3 91 [11]12353 out ( #0x91 ), a
2F17 12354 WaitForVDP_Vblank2:
2F17 DB 99 [11]12355 in a, ( #0x99)
2F19 CB 7F [ 8]12356 bit #7,a
2F1B CAr17r2F [10]12357 jp z, WaitForVDP_Vblank2
2F1E C3r08r2F [10]12358 jp WaitForVDP_Vblank.restart

new measurement:

Por Wlcracks

Hero (572)

15-02-2018, 21:10

second code in more aligned way:

Por hit9918

Prophet (2932)

15-02-2018, 21:25

I tried the same code setup on a NMS8220, even more unstable.

aha, so now we know that the MSX2 VDP got the same thing!
so far I only knew about MSX1.
when the event is coming in the same moment as the cpu is reading the register then the event gets lost

in an interrupt handler the problem does not occur

Por Grauw

Ascended (10819)

15-02-2018, 22:39

Aah, maybe that’s it, indeed. I recall hearing about that before.

You can test the VR flag instead…

Por Wlcracks

Hero (572)

16-02-2018, 08:26

Thank you all, but there is no VR flag on the TMS9929A of my knowledge...

Quote:

when the event is coming in the same moment as the cpu is reading the register then the event gets lost

in an interrupt handler the problem does not occur

With this beautiful sentence, i disabled the vdp interrupts IE flags in register 1. Still unstable, maybe less then before but still not usable. I think maybe its in the "in/out" logic decoding of the VG8020/00 and maybe others. My other msx1 doesnt have a printer port.
On the NMS8220 it IS stable. Maybe its corrected with the MSX engine. I dont think its the VDP because the instablity is still there when enabling the IE flag. I didnt test the VR flag, on request i could. I dont use MSX2 > commands yet in my project.

I will put my code on the INT.

Por Grauw

Ascended (10819)

16-02-2018, 09:48

What I imagine happens is;

The VDP puts the status register values on the bus in response to the IORQ+RD, the CPU receives the values, then while the IORQ+RD signal is still active the interrupt occurs (but too late for the CPU to catch), and when the IORQ+RD signal ends the VDP resets the status flags.

Por DarkSchneider

Paragon (1030)

16-02-2018, 13:22

Beware in the case of status register S#0 as it is reset when read, so the BIOS interrupt handler would fail. S#0 should only be read by the ISR, and you will have the value on A register.

If want to read any other than S#0, before returning remember to restore the values to read S#0, as the BIOS ISR will not set it, directly read the VDP register already set to read, not selecting the S#0.

Por Wlcracks

Hero (572)

16-02-2018, 16:12

I want to shutdown the MSX (basic) system for full speed temporary. When the program was ready ,continue the normal system. Disable all interrupts and reading the VDP0 Status register Interrupt Flag (F) by polling seemed like a quick and dirty way. Well back to the drawing board. Testing on real systems is still important

Por TomH

Champion (375)

16-02-2018, 16:36

You can still shut down BASIC and the BIOS. Switch to IM 2, place your interrupt handler at an address where top byte = bottom byte and point I towards a 257-byte table of that byte. Then the interrupt will go directly to your code.

E.g.

setup_interrupt:
    DI
    IM 2
    LD A, $81
    LD I, A
    EI

L8080:
    ... interrupt response here ...
    RETI

L8100:
    REP(db $80, 257)

EDIT: or possibly an open collector value of 0xff can be safely assumed on the MSX during the interrupt cycle given that the bus isn't shared? If so then you could reliably use IM 2 and an ordinary two-byte address pointer to any old address. But somebody with better knowledge of the wider panoply of machines would be better placed to comment. The above is the conservative answer.