Description

DW64MX1 chip
(photo by usario_msx2)

The DW64MX1 is a gate array designed for MSX2 by Daewoo. It includes the following features:

Intel 8255 compatible Programmable Peripheral Interface (PPI)
Slot select circuitry
DRAM control signals
256 KiB memory mapper
Chip selects for VDP, PSG, Real Time Clock (RTC) and printer. Note that it does not include a PSG or RTC, only chip select signals for those IC's
Keyboard control, Caps Lock LED
Cassette interface

It's used in a few MSX1 computers based on the Daewoo CPC-200, all MSX1 Daewoo consoles, all MSX2 Daewoo consoles and computers, including the machines released under another brandname.

Machines using this IC normally have their RAM in slot 0-2. Much software has a problem with that, even though it's perfectly fine according to MSX standard. For example the infamous POKE -1,... workaround doesn't work & causes such machines to hang.

This IC is packaged in a 64 pin "Shrink" DIP (same as V9938).

Pinout

Pin	Type	Name	Function
1	O	MPX	DRAM address multiplexer select
2	O	CAS02	DRAM Column Address Strobe slot 0-2
3	O	MA14	Memory mapper expanded address lines (64/128/256 KB)
4	O	MA15
5	O	MA16
6	O	MA17
7	O	RA7	DRAM address / refresh bit 7
8	I	A0	Z80 Address Bus
9	I	A1
10	I	A2
11	I	A3
12	I	A4
13	I	A5
14	I	A6
15	I	A7
16	O	GND	Ground
17	I	A14	Z80 Address Bus
18	O	ROMCS	Main ROM Chip Select
19	O	SLT01	Slot select outputs
20	O	SLT2
21	O	SLT03
22	O	PSG_CLK	PSG clock (1.79 MHz)
23	I	RESET	Hard Reset
24	O	YA (lsb)	Keyboard scan row select
25	O	YB
26	O	YC
27	O	YD (msb)
28	O	Y10	Keyboard row scan signal
29	O	PPISND	PPI Sound Output (Keys)
30	O	CAPS	Keyboard Caps Lock LED Signal
31	O	RD_KEYS	Keyboard Read Strobe
32	I	VCC	+5V power supply
33	O	SLT3	Slot 3 Select Output
34	O	SLT1	Slot 1 Select Output
35	O	BUSDIR	Data Bus Buffer Control
36	O	WAIT	Z80 /WAIT
37	I	IORQ	Z80 control signals
38	I	MREQ
39	I	RD
40	I	WR
41	I	M1
42	I	RFSH
43	I	RSEL
44	I	A15	Z80 Address Bus
45	O	PSG_CS	PSG Chip Select
46	O	VDP_CS	VDP Chip Select
47	O	REM	Cassette Tape Motor On/Off
48	O	GND	Ground
49	O	CMO	Cassette tape write signal
50	I/O	D0	Z80 data bus
51	I/O	D1
52	I/O	D2
53	I/O	D3
54	I/O	D4
55	I/O	D5
56	I/O	D6
57	I/O	D7
58	O	PWR	Printer Write data latch
59	O	PSTB	Printer Strobe output
60	I	BUSY	Printer BUSY input
61	O	RTC_CS	RTC Chip Select
62	O	RTC_AL	RTC Address Latch
63	I	CPU_CLK	CPU clock (3.58 MHz)
64	I	VCC	+5V power supply

Source: [1]

Retrieved from "https://www.msx.org/wiki/Daewoo_DW64MX1"